AD9739ABBCZ
Компания Analog Devices Inc.
- Lifecycle
- Active
- Stock
- 3752 ПКС
- Package
- BGA-160
- Series
- Сбор данных - цифровые в аналоговые преобразователи (DAC)
Это подробное сравнение AD9739ABBCZ и AD9736BBCZRL предоставляет ценную информацию об их технических характеристиках и ключевых особенностях. Мы подробно рассматриваем важные факторы, включая соответствие требованиям RoHS, статус REACH, серию, способ монтажа, тип корпуса и другие соответствующие характеристики. Представление различий рядом упрощает выбор компонентов, облегчая вам выбор оптимального варианта для вашего конкретного применения.
Replacement verdict
The AD9736BBCZRL is a viable functional substitute for the AD9739ABBCZ in many DAC applications, sharing the same 160-lead CSP-BGA footprint, 1.8 V/3.3 V supply architecture, and LVDS input interface. However, the AD9739ABBCZ offers a higher maximum update rate and wider output bandwidth, so designs operating near the upper frequency limit of the AD9736BBCZRL should be validated against the reduced dynamic performance before substitution.
Компания Analog Devices Inc.
Компания Analog Devices Inc.
Rows are prioritized by design impact. Highlighted values require attention during substitution.
Key electrical and mechanical differences between the two devices
| Parameter | AD9739ABBCZ | AD9736BBCZRL | Why it matters |
|---|---|---|---|
| Resolution | 14 bit | 14 bit | Bit depth determines the quantization noise floor and achievable dynamic range of the DAC output. |
| Maximum Update Rate | 2500 MSPS | 1200 MSPS | Higher sample rate enables wider signal bandwidths and higher intermediate frequencies in the transmit path. |
| Output Type | Current-steering (differential) | Current-steering (differential) | Output architecture determines the required external interface network and load termination. |
| Input Interface | LVDS (dual-port, DDR) | LVDS (dual-port, DDR) | The digital input format must match the upstream FPGA or ASIC driver to ensure reliable data capture. |
| Supply Voltage | 1.8 V / 3.3 V | 1.8 V / 3.3 V | Supply rails must be compatible with the board power architecture for direct substitution. |
| Package | 160-ball CSP-BGA | 160-ball CSP-BGA | Package and pinout compatibility is essential for drop-in replacement on an existing PCB. |
| Power Consumption | Approx. 1.1 W | Approx. 0.55 W | Power dissipation affects thermal design and whether the existing board cooling is sufficient. |
| SFDR | Higher (optimized for wideband) | Lower | Spurious-free dynamic range impacts spectral purity and signal quality in the target application. |
Send your BOM and application constraints for technical and sourcing review.
Use manufacturer datasheets as the final authority.
| Specification | AD9739ABBCZ | AD9736BBCZRL |
|---|---|---|
| Supplier | - | Analog Devices Inc. |
| Part Status | Active | Active |
| Number of Bits | 14 | 14 |
| Number of D/A Converters | 1 | 1 |
| Output Type | Current - Unbuffered | Current - Unbuffered |
| Differential Output | Yes | Yes |
| Data Interface | LVDS - Parallel | LVDS - Parallel |
| Reference Type | External, Internal | External, Internal |
| Voltage - Supply, Analog | 1.7V ~ 1.9V, 3.1V ~ 3.5V | 1.7V ~ 1.9V, 3.13V ~ 3.47V |
| Voltage - Supply, Digital | 1.7V ~ 1.9V, 3.1V ~ 3.5V | 1.7V ~ 1.9V, 3.13V ~ 3.47V |
| INL / DNL(LSB) | ±2.5, ±2 | ±1, ±0.6 |
| Architecture | Quad-Switch | Oversampling Interpolating DAC |
| Operating Temperature | -40°C ~ 85°C | -40°C ~ 85°C |
| Settling Time | 13µs (Typ) | - |
The AD9739ABBCZ is a 14-bit, 2.5 GSPS RF digital-to-analog converter, while the AD9736BBCZRL is a 14-bit, 1.2 GSPS RF DAC. The AD9739 offers a higher maximum update rate and includes a dual-port LVDS data interface with a DLL-based timing adjustment, whereas the AD9736 provides a single-port LVDS interface. Both are members of Analog Devices' TxDAC family and are supplied in a 160-ball CSP_BGA package.
Both devices are offered in the same 160-ball CSP_BGA (BC-160-1) package footprint, but they are not functionally interchangeable without design verification. Pin assignments and interface timing differ between the two parts, so the PCB layout and digital interface must be validated against the respective datasheets before any substitution.
The AD9739ABBCZ supports a maximum DAC update rate of 2.5 GSPS. The AD9736BBCZRL supports a maximum DAC update rate of 1.2 GSPS. The applicable rate depends on the input data rate and the chosen interpolation configuration documented in each datasheet.
The AD9739ABBCZ uses a dual-port LVDS data interface with a delay-locked loop (DLL) for input timing adjustment. The AD9736BBCZRL uses a single-port LVDS data interface. The interface width and timing requirements differ, so the digital source (FPGA or ASIC) must be configured accordingly for each part.
Both devices integrate digital interpolation filters, but the available interpolation factors and their configuration registers differ. Designers must consult the AD9739 and AD9736 datasheets to confirm the supported interpolation modes and the resulting output data rate for each specific part.
Both the AD9739ABBCZ and AD9736BBCZRL are 14-bit current-output DACs. They provide complementary current outputs intended to drive a transformer or resistive load, and the full-scale output current is set by an external resistor as described in the respective datasheets.
No. Although both are 14-bit DACs in the same 160-ball CSP_BGA package, the AD9736BBCZRL has a lower maximum update rate (1.2 GSPS versus 2.5 GSPS) and a different digital interface architecture. A drop-in replacement is not supported; the design must be re-validated against the AD9736 datasheet, including interface timing, clocking, and interpolation settings.
Both devices are intended for high-speed signal synthesis applications such as wireless infrastructure transmitters, broadband communications systems, and instrumentation. The AD9739ABBCZ, with its higher 2.5 GSPS update rate, is suited to wider-bandwidth or higher-frequency synthesis, while the AD9736BBCZRL targets applications requiring up to 1.2 GSPS. Final selection should be based on the bandwidth and interface requirements of the specific system.